Keynote Speech:
SPROF/SPROG: Performance Analysis through Synthetic Trace Generation
Lieven Eeckhout, Koen De Bosschere, and Henk Neefs
Universiteit GentExtracting Fine Grain profiles of In-Order Executions of Instruction Level Parallel Programs
Nicola Zingirian Massimo, and Maresca
University of PadovaAccurate Simulation and Evaluation of Code Reordering
David Kaeli and John Kalamatianos
Northeastern UniversityQuantifying Instruction-Level Parallelism Limits on an EPIC Architecture
Hsien-Hsin Lee, Youfeng Wu, and Gary Tyson
University of Michigan
Performance Engineered Software and Hardware Systems
Dr. Frederica Darema
Senior Science and Technology Advisor, NSF/CISE
Performance Evaluation of Real-Time Scheduling On a Multicomputer Architecture
Luis Friedrich, Rafael Cancian, Romulo S. de Oliveira, and Thadeu B. Corso
Universidade Federal de Santa CatarinaPerformance Evaluation of Middleware Bridging Technologies
Rod Fatoohi, Vandana Gunwani, Qi Wang, and Charlton Zheng
San Jose State UniversityA Practitioner Report on the Evaluation of the Performance of the C, C++, & Java Compilers on OS/390
David Cargill and Mohammad Radaideh
IBM Canada Ltd.DB2 for OS/390 V5 Vs V6 Outer Join Performance
Maryela Weihrauch
IBM STL
Issues in the Design of Store Buffers in Dynamically Scheduled Processors
Ravi Bhargava and Lizy K. John
University of Texas at AustinPerformance Tradeoffs in Sequencer Design on a New G4 PowerPC(TM)
Jeff Rupley II and David C. Holloway
Motorola Somerset Design CenterTrading off Instructions for Locality in Wide Issue Superscalar Processors
Murali Annavarm, Gary S. Tyson, and Edward S. Davidson
University of Michigan
Checking Order-insensitivity using Ternary Simulation in Synchronous Programs
Moez Yeddes Hassane Alla
Laboratoire d'Automatique de GrenobleDo Generational Schemes Improve the Garbage Collection Efficiency?
Illinois Institute of Technology
Witawas Srisa-anA Quantitative Simulator for Dynamic Memory Managers
Illinois Institute of Technology
Chia-Tien Dan Lo, Witawas Srisa-an and J. Morris ChangReal-Time Image on QoS Web
Hong Liu and Hongdu Fang
University of Massachusetts Dartmouth
Modeling Load Address Behavior Through Recurrences
Luis M. Ramos, Pablo Ibanez, Victor Vinals, and J. M. Llaberia
Centro Politecnico SuperiorMethodology to Optimize the Cost/Performance of Disk Subsystems
Todd Boyd and Renato Recio
IBM PoughkeepsieInvocation Profile Characterization of Java Applications
Francesco Bellotti, Andrea Barisone, Riccardo Berta, and Allessandro De Gloria
University of Genoa
Testing Commercial RTOS
by M. Timmerman
Real-Time Consult and Royal Military Academy, Belgium
Invited Paper: Some Observations based on a Simple Model of MP Scaling
Eric Kronstadt
IBM T. J. Watson Research CenterPerformance Scalability in Multiprocessor Systems with Resource Contention
Shikharesh Majumdar
Carleton UniversityAn Efficient Solver for Cache Miss Equations
Antoinio Gonzalez, Nerina Bermudo, Xavier Vera, adn Josep LLosa
Universitat Politecnica de CatalunyaAn Analytical Model for Loop Tiling and its Solution
Vivek Sarkar and Nimrod Megdido
IBM T. J. Watson Research Center and IBM Almaden
Invited CommBench---A Telecommunications Benchmark for Network Processors
Tilman Wolf and Mark Franklin
Washington UniversitySimplified Workload Characterization Using Unified Prediction
Karel Driesen, Josee Colette, Feng Ji, et al.
McGill UniversityA New Approach in the Analysis and Modeling of Disk Access Patterns
Maria Gomez and Vicente Santonja
Universidad Politecnica de Valencia
Invited Talk: Mobile Functionality in a Pervasive World
Jerzy Jagiello, et al.
Department of Defence, AustraliaA Server Performance Model for Static Web Workloads
Krishna Kant and C.R.M. Sunderam
IntelDesign Alternatives for Scalable Web Server Accelerators
Junehwa Song, Eric Levy-Abegnoli, Arun Iyengar, and Daniel Dias
IBM T. J. Watson Research CenterWeb Latency Reduction via Client-Side Prefetching
Trevor Mudge, Avinoam N. Eden, and Brian W. Joh
University of Michigan