WORKSHOP on UNIQUE CHIPS and SYSTEMS (UCAS-2)

To be held in conjunction with IEEE International Symposium on Performance  Analysis of Systems and Software (ISPASS06)

March 19, 2006

Hyatt Regency Austin

Austin, Texas

• Advance program linked NEW !!

• Submission page is available

• Submission guideline is here

Call For Paper [ PDF ]

This workshop looks forward to bring together unique research in all areas of chip and system design. We are looking forward to assembling a program with unique technologies, circuits and architectures that your academic or industry team is working on.

Topics of interest include but not limited to unique aspects of:

• Massively parallel architectures
• Multithreaded architectures
• Grid computing  
• Reconfigurable Computing
• Pervasive Computing
• Radiation hardened systems
• Fine-grain parallel architectures
• VLSI Systems
• Low Power Architectures and Systems
• Low Power Software
• Nanoelectronics and Gigascale Systems
• Special Function Systems
• Bio Informatics
• Integrated Security Systems
• Visualization 
• Biometrics
• Biomedical
• Data hiding
• Blind Signal and Image Processing
• Wireless ad hoc and sensor networks
• Unique technologies (quantum well, optoelectronic, biologically inspired circuits/systems, RF and high frequency, etc)

Prospective authors are invited to submit papers in one of the following two formats:

1.      A full paper not exceeding 8 pages in length in standard IEEE two-column format.

OR

2.      A two page extended abstract with a set of viewgraphs.

All submissions should be in electronic form only via the website. All papers will be reviewed by the technical program committee for quality, originality and relevance. We expect to publish selected papers in a Workshop proceedings. Please include the list of authors and their affiliations, addresses, telephone and email addresses and the name of the corresponding author.

Submission of papers via http://www.ispass.org/ucas2/submit.html

Please note that submission has a two-step process, with "Start" and "Finalize". After  a "Start" submission, authors can modify or update their papers until a "Finalize" submission. Submission deadline is January 20 2006 11:59:59 PM CST. Upon successful submission, you should receive a confirmation email at the contact address you specified. Please contact the committee if you do not receive this confirmation to ensure successful processing of your submission.

Important Deadlines:

Paper Submission:                    January 30, 2006

Notification of Acceptance:       February 24, 2006

Final Version Due:                     March 1, 2006

Organizers:

            Eugene John, University of Texas at San Antonio     

            Juan Rubio, IBM Austin Research Lab

Technical Program Committee:           

  Rajendra Boppana, University of Texas at San Antonio  

  Lee D. Coraor, Pennsylvania State University

  Manoj Franklin, University of Maryland

  Eugene John, University of Texas at San Antonio

  Byeong Kil Lee, Texas Instruments

  Tao Li,  University of Florida  

  Rabi Mahapatra,Texas A&M University, College Station

  Mark McDermott,  University of Texas at Austin

  Rama R. Menon,  Intel

  Sankaran Menon,  Intel

  Anand Ojha,  University of Denver  

  Vojin G. Oklobdzija, University of California, Davis

  C. J. Paul,  IBM

  Peter Hofstee, IBM

  Juan Rubio,  ARL IBM

  Zili Shao, The Hong Kong Polytechnic University

  Deepu Talla,  Texas Instruments

  C. Vasudevan,  IBM

  Laurence T. Yang, St. Francis Xavier University, Canada

Previous workahop:

            UCAS-1